1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device.
2. Description of the Related Art
In recent years, there are cases where copper (Cu) is used as a material for wiring patterns to form fine wiring patterns in semiconductor devices. When a wiring pattern is formed using copper, a hillock may be produced in the wiring pattern. Japanese Patent Laid-Open No. 2011-249582 proposes a method of reducing hillocks by annealing after plating processing and CMP for forming a wiring pattern.